To make electrical devices, such as microprocessors and other computer chips, a semiconductor wafer such as a silicon wafer, is subjected to an ion implantation process that introduces impurity atoms or dopants into a surface region of a device side of the wafer. The ion implantation process damages the crystal lattice structure of the surface region of the wafer, leaving the implanted dopant atoms in interstitial sites where they are electrically inactive. In order to move the dopant atoms into substitutional sites in the lattice to render them electrically active, and to repair the damage to the crystal lattice structure that occurs during ion implantation, the surface region of the device side of the wafer is annealed by heating it to a high temperature.
Three types of semiconductor wafer heating methods are known in the art which are directed to annealing:                Adiabatic—where the energy is provided by a pulse energy source (such as a laser, ion beam, electron beam) for a very short duration of 10×10−9 to 100×10−9 seconds. This high intensity, short duration energy melts the surface of the semiconductor to a depth of about one to two microns.        Thermal flux—where energy is provided for 5×10−6 to 2×10−2 seconds. Thermal flux heating creates a substantial temperature gradient extending much more than two microns below the surface of the wafer, but does not cause anything approaching uniform heating throughout the thickness of the wafer.        Isothermal—where energy is applied for 1 to 100 seconds so as to cause the temperature of the wafer to be substantially uniform throughout its thickness at any given region. See, e.g., U.S. Pat. No. 4,649,261 at Col. 3, line 65 to Col. 4, line 13.        
Unfortunately, high temperatures required to anneal the device side of a semiconductor wafer can produce undesirable effects using existing technologies. For example, dopant atoms diffuse into the silicon wafer at much higher rates at high temperatures, with most of the diffusion occurring at temperatures close to the high annealing temperature required to activate the dopants. With increasing performance demands for semiconductor wafers and decreasing device sizes, it is necessary to produce increasingly shallow and abruptly defined junctions.
Traditional rapid thermal processing (RTP) systems have heated semiconductor wafers in a near-isothermal manner, such that the entire wafer is heated to a high temperature. In rapid thermal annealing processes, a desired goal is to heat the wafer at a very high rate, yet keep the wafer at the desired peak temperature for as short a time as possible. The heating is followed by as rapid a cooling as possible. This allows the required annealing to occur while minimizing undesirable side effects, such as excessive dopant diffusion within the bulk of the wafer. For rapid thermal annealing, heating is generally by activating an array of tungsten-halogen lamps disposed above the device side of the wafer. The heating rate is limited by the thermal mass of the semiconductor wafer. Hence, a very large lamp power must be applied to reach the desired peak heating temperature. This leads to very large power surges during heating ramp-up. In addition, the thermal masses of the lamp filaments limit how fast the radiant heating can be switched off, and thus may prolong the time that the wafer spends at or near the peak temperature. The time constant for typical tungsten-halogen lamps is relatively long, on the order of 0.3 seconds. Hence, the filaments remain hot and continue to irradiate the wafer after the power has been cut off.
The vast majority of dopant diffusion occurs in the highest temperature range of the annealing cycle. Lower annealing temperatures result in significantly less activation of the dopants and therefore higher sheet resistance of the wafer, which exceeds current and/or future acceptable sheet resistance limits for advanced processing devices. Hence, lower annealing temperatures do not solve dopant diffusion problems.
As the state of the art in device production has moved toward devices with progressively decreasing junction depths, there has been an accompanying perception that heat treatment may be enhanced using pulsed heating methods and systems for processing semiconductor wafers. At least one approach in the late 1980's involved a low-temperature background heating stage followed by a pulsed annealing stage. The low-temperature background heating stage typically involved heating the wafer to a mid-range temperature, such as 600° C. for example, with tungsten-halogen lamps, followed by a rapid increase in the temperature to 1100° C. by a pulse from flash lamps for a very short duration, such as 400 μs. The wafer was permitted to cool by radiation. No technique for controlling the repeatability of the process (which simply fires flash lamps at the end of an isothermal anneal) using pulse heating, nor the repeatability from wafer to wafer was provided. Moreover, with regard to process control in terms of repeatability, simple, thermostatic control of background heating was employed. See, e.g., J. R. Logan, et al., “Recrystallisation of amorphous silicon films by rapid isothermal and transient annealing,” Semiconductor Sci. Tech. 3, 437 (1988); and J. L. Altrip, et al., “High temperature millisecond annealing of arsenic implanted silicon,” Solid-State Electronics 33, 659 (1990). It is also worthwhile to note that, while both of these references utilize simple, thermostatic control of background heating during pulse exposure, the Logan reference is still further limited in illustrating an implementation of such control wherein the temperature of the substrate undergoing treatment is only indirectly monitored. That is, the substrate being treated is supported by a support substrate. The temperature of the support substrate is monitored, rather than the substrate actually undergoing treatment. Unfortunately, this arrangement potentially further exacerbates problems with regard to thermostatic control by introducing uncertainty as to the temperature of the object which is actually being treated.
U.S. Pat. Nos. 4,649,261 and 4,698,486 disclose, in one alternative embodiment, methods for heating a semiconductor wafer by combining isothermal heating and thermal flux heating (e.g., FIG. 11). The entire wafer is heated to a first intermediate temperature via isothermal heating, such as with continuous wave lamps. Then, the front side of the wafer is heated via thermal flux (pulsed means, such as a high-power pulsed lamp array). The heating methods are carried out while the wafer and heating sources are held within an integrating light pipe or kaleidoscope with reflective inner surfaces that reflect and re-reflect radiant energy toward the wafer. The patents do not describe multi-pulse heating modes, and no techniques are provided to control the repeatability of heating by multiple pulses or from wafer to wafer.
It is submitted that pulse mode heating, as carried out by the prior art, has met with only limited success, despite its perceived advantages, since certain difficulties which accompany its use have not been appropriately addressed, as will be further described below.
U.S. Pat. No. 4,504,323 discusses an annealing method in which a semiconductor wafer is pre-heated to 400° C. in a furnace, then exposed to radiation from an array of flash discharge lamps for a pulse of 800 μsec. The pre-heating temperature is below the desired annealing temperature, and dopant diffusion does not occur. The patent does not disclose multi-pulse heating modes, and no techniques are provided to control the repeatability of heating by multiple pulses or from wafer to wafer.
U.S. Pat. No. 4,615,765 discloses thermal processing using laser or particle beam sources. The patent focuses on methods for selectively delivering power from the laser to specific regions of the semiconductor wafer so as to heat the desired regions without heating other regions. The method is based on tailoring the absorption qualities of two regions to cause different temperature rises from the pulses with predetermined pulse energy, pulse duration and pulse interval. No techniques are provided to control the repeatability of heating by multiple pulses or from wafer to wafer.
U.S. Pat. No. 5,841,110 provides a more recent approach in the field of RTP. Specifically, a system parameter is adjusted on the sole basis of spectrally integrated reflectivity. Moreover, this reference is somewhat unrelated to the present invention at least for the reason that the reference includes no direct teachings for the use of pulsed sources. While the system is effective and provided significant improvements over the then-existing prior art, it is submitted that the present invention provides still further advantages, as will be seen.
The temperature at a semiconductor wafer surface during pulsed heating can be influenced by several factors, including: (a) background temperature distribution; (b) the pulse energy type, shape and duration; and (c) the optical properties of the wafer. In laser processing, variations in wafer surface reflectivity can cause significant changes in the power coupling on different wafers, or even at different positions on the same wafer. Although lamp radiation has a broader spectrum than laser radiation, variations in optical properties are also known to impact the temperature reached on a wafer surface during rapid thermal processing with tungsten-halogen lamps. Hence variations in coatings can cause variations in reflectivity, altering the absorbed energy on the surface of a wafer or on the surfaces of two wafers intended to have the same surface characteristics.
FIG. 2 is a graph plotting temperature versus time curves of irradiation applied to two semiconductor wafers, each with different surface characteristics. Although the radiation pulses applied to each had the same energy, the more radiation-reflecting wafer reached a lower peak temperature (about 1000° C.) than the more radiation-absorbing wafer (1300° C.). Because identical radiation pulses were applied, a temperature versus time curve 12 for the more reflective wafer is otherwise comparable to a temperature versus time curve 14 for the more absorbing wafer. Thus, on a more reflective wafer, the temperature rise induced by the same pulse or series of pulses from a radiant source is lower than the temperature rise induced on a more absorbing wafer.
In addition to variations in heating temperature caused by different wafer reflectivity, undesired variations can also result from use of multiple pulses of radiation. FIG. 3 is a graph plotting temperature versus time curves for the wafer surface temperature 22 and backside temperature 24, and plotting background heater power versus time 26. With the heating method illustrated in this graph, the background heater is activated to heat the entire wafer (surface and backside) to a first temperature of about 800° C. The heater is then switched to a steady state, and two rapid pulses from a pulse source (such as an arc lamp or laser) are applied to heat the wafer surface to a desired annealing temperature (i.e., 1300° C.). The backside temperature of the wafer remains near the first temperature so as to preclude undesired dopant diffusion. As the heat from the energy pulse diffuses through the bulk of the wafer, the temperature of the wafer backside tends to rise. FIG. 3 shows a 50° C. to 100° C. rise in backside temperature from the first temperature. Following the first pulse, the surface temperature of the wafer drops as heat is conducted into the bulk of the wafer, and the wafer reaches a nearly isothermal condition. The drop in surface temperature is not as rapid as the rise in temperature due to the pulse, such that the wafer surface is still above the first temperature when the second pulse is activated. In this case, the second pulse produces a larger peak temperature (above 1300° C.) than the first pulse, leading to difficulties for process control.
The present invention resolves the foregoing problems and difficulties while providing still further advantages.